12th October 2016
Scientists create the smallest ever transistor – just a single nanometre long
Researchers at the Department of Energy's Lawrence Berkeley National Laboratory have demonstrated a working 1 nanometre (nm) transistor.
For more than a decade, engineers have been eyeing the finish line in the race to shrink the size of components in integrated circuits. They knew that the laws of physics had set a 5-nanometre threshold on the size of transistor gates among conventional semiconductors, about one-third the size of high-end 14-nanometre-gate transistors currently on the market.
However, some laws are made to be broken, or at least challenged.
A research team led by faculty scientist Ali Javey at the Department of Energy's Lawrence Berkeley National Laboratory (Berkeley Lab) has done just that by creating a transistor with a functioning 1-nanometre gate. For comparison, a strand of human hair is about 50,000 nanometres thick.
"We made the smallest transistor reported to date," said Javey, lead principal investigator of the Electronic Materials program in Berkeley Lab's Materials Science Division. "The gate length is considered a defining dimension of the transistor. We demonstrated a 1-nanometre-gate transistor, showing that with the choice of proper materials, there is a lot more room to shrink our electronics."
The key was to use carbon nanotubes and molybdenum disulfide (MoS2), an engine lubricant commonly sold in auto parts shops. MoS2 is part of a family of materials with immense potential for applications in LEDs, lasers, nanoscale transistors, solar cells, and more.
This breakthrough could help in keeping alive Intel co-founder Gordon Moore's prediction that the density of transistors on integrated circuits would double every two years, enabling the increased performance of our laptops, mobile phones, televisions, and other electronics.
"The semiconductor industry has long assumed that any gate below 5 nanometres wouldn't work – so anything below that was not even considered," said study lead author Sujay Desai, a graduate student in Javey's lab. "This research shows that sub-5-nanometre gates should not be discounted. Industry has been squeezing every last bit of capability out of silicon. By changing the material from silicon to MoS2, we can make a transistor with a gate that is just 1 nanometre in length, and operate it like a switch."
"This work demonstrated the shortest transistor ever," said Javey, who is also a UC Berkeley professor of electrical engineering and computer sciences. "However, it's a proof of concept. We have not yet packed these transistors onto a chip, and we haven't done this billions of times over. We also have not developed self-aligned fabrication schemes for reducing parasitic resistances in the device. But this work is important to show that we are no longer limited to a 5-nanometre gate for our transistors. Moore's Law can continue a while longer by proper engineering of the semiconductor material and device architecture."
His team's research is published this month in the peer-reviewed journal Science.
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